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    Item type:Article, Access status: Open Access ,
    Prototyp systemu profilowania pętli kodu źródłowego jako narzędzia analizy kodu w celu efektywnego przyspieszenia obliczeń wielkiej skali
    (Wydawnictwa AGH, 2010) Pietroń, Marcin; Russek, Paweł; Wiatr, Kazimierz
    This paper presents the research on FPGA based acceleration of HPC applications. The most important step to achieve this goal is to extract code that can be sped up. A major drawback is the lack of a tool which could do it. The HPC applications usually consist of a huge amount of complex source code. This is one of the reasons why the process of acceleration should be as automated as possible. Another reason is to make use of HLL (High Level Languages) such as Mitrion-C and Impulse-C. Loop profiling is one of the steps to check if the insertion of HLL to existing HPC source code is possible to gain acceleration of these applications. Hence the most important step to achieve acceleration is to extract the most time consuming code and data dependency, which makes the code easier to be pipelined and parallelized. Data dependency also gives information on how to implement algorithms in an FPGA circuit with the minimal initialization of it during the execution of algorithms.