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Browsing by Subject "field programmable gate arrays"

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    Item type:Article, Access status: Open Access ,
    Potokowe przetwarzanie obrazów w oparciu o środowisko EDK i magistralę OPB
    (Wydawnictwa AGH, 2006) Jamro, Ernest; Wiatr, Kazimierz
    This paper introduces a novel architecture denoted as On-chip Pipeline Architecture (OpiAr). The OPiAr is used for pipeline low-level image processing in Field Programmable Gate Arrays (FPGAs). The architecture OPiAr employs On-chip Peripheral Bus (OPB) developed by IBM and Xilinx Embedded Development Kit (EDK) and it is a modification of Dedicated Pipeline Architecture (DePiAr). Pipeline Image processing, as it was shown for the DePiAr, reduces external memory access and facilitates low-level image processing.