Browsing by Subject "reconfigurable systems"
Now showing 1 - 2 of 2
- Results Per Page
- Sort Options
Item type:Thesis, Access status: Restricted , Implementacja enkodera standardu MJPEG w układzie FPGA(Data obrony: 2019-01-29) Mielczarek, Krzysztof
Wydział Elektrotechniki, Automatyki, Informatyki i Inżynierii BiomedycznejItem type:Article, Access status: Open Access , Softprocesor wizyjny z rekonfigurowalną listą instrukcji(Wydawnictwa AGH, 2006) Kwiatkowski, Marek; Kołton, Mariusz; Russek, Paweł; Wiatr, KazimierzThe Authors present hardware solution implemented in FPGA reconfigurable logic which is a proposal of a universal platform for the image processing. Dedicated hardware is a traditional solution in image processing area as an alternative to the software methods because it offers high processing power/hardware resources ratio. The common disadvantages of that approach is time consuming implementation time. Presented processor with reconfigurable instruction set is a compromise between software and hardware. It offers easier design flow. In the paper discrete cosine transform implementation is presented as an example.
