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FPGA-based DVCPRO HD decoder implementation using impulse C

creativeworkseries.issn1508-2806
dc.contributor.authorCichoń, Sławomir
dc.contributor.authorGorgoń, Marek
dc.date.available2017-09-19T09:27:40Z
dc.date.issued2013
dc.descriptionBibliogr. s. 544-546.
dc.description.abstractHigh-level languages (HLL) for defining hardware implementation are important in both academic and commercial research. Impulse C could be an example of such language. This environment provides a programming model and library of functions for parallel applications, targeting FPGA-based platforms with the ability to partition the algorithm between software and hardware. This article’s aim is to briefly describe DVCPRO HD, one of the intra-frame video-coding algorithms widely used in consumer equipment. DVCPRO HD is a DCT -based lossy video coding algorithm which uses variable-length coding (VLC) and run-length encoding (RLE) to achieve a 5:1 compression ratio. This paper presents DVCPRO HD video-coding-standard principles as well as decoder implementation working in real-time, compliant with the afore-mentioned standard and implemented in Impulse C. According to the authors’ knowledge, the presented solution is the first FPGA implementation of this coding standard which includes all three VLC stages of data re-arrangement. What is more, this is the first DVCPRO HD implementation which utilizes Impulse C.en
dc.description.placeOfPublicationKraków
dc.description.versionwersja wydawniczapl
dc.identifier.doihttps://doi.org/10.7494/csci.2013.14.4.531
dc.identifier.eissn2300-7036
dc.identifier.issn1508-2806
dc.identifier.nukatdd2014319044pl
dc.identifier.urihttps://repo.agh.edu.pl/handle/AGH/49149
dc.language.isoeng
dc.publisherWydawnictwa AGH
dc.relation.ispartofComputer Science
dc.rightsAttribution 4.0 International
dc.rights.accessotwarty dostęp
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/legalcode
dc.subjecthigh definitionen
dc.subjectvideo decodingen
dc.subjecthigh level languagesen
dc.subjectpipelined architectureen
dc.subjectintra-frameen
dc.titleFPGA-based DVCPRO HD decoder implementation using impulse Cen
dc.title.relatedComputer Science
dc.typeartykuł
dspace.entity.typePublication
publicationissue.issueNumberNo. 4
publicationissue.paginationpp. 531-546
publicationvolume.volumeNumberVol. 14
relation.isAuthorOfPublication881c1ec6-0eaf-4ad1-80ca-cb809d8f127c
relation.isAuthorOfPublication.latestForDiscovery881c1ec6-0eaf-4ad1-80ca-cb809d8f127c
relation.isJournalIssueOfPublicationc841190f-a975-443f-afa6-82a98ea098a6
relation.isJournalIssueOfPublication.latestForDiscoveryc841190f-a975-443f-afa6-82a98ea098a6
relation.isJournalOfPublication020291ee-249b-4dcf-98a3-276a2f7981aa

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