Single Photon Counting X-ray Detector with 25 um Pixel Pitch

Abstract

This paper presents the design and measurement results of a prototype integrated circuit called PIX25 for the readout hybrid pixel detectors operating in Single Photon Counting (SPC) mode. The IC is designed in the CMOS 40 nm process and its core is the matrix of 128 × 128 pixels. Usually, the pixel pitch in the SPC hybrid detector systems is in the range of 100 um down to 50 um. In the presented PIX25 IC the pixel pitch is only 25 um, which allows an increase in the position spatial resolution of the hybrid pixel detector and count rate per unit detector area beyond the state-of-the-art. Each pixel consists of a fast charge-sensitive amplifier with a detector leakage compensation circuit, a discriminator with a controlled threshold level, and 20-bit counters. To reduce the effects of pixel-to-pixel mismatch, each pixel contains independent blocks for offset and gain precise trimming. An important feature of the IC is its high reconfigurability. Each pixel can operate with the detector collecting holes or electrons. Thanks to the wide range of bias currents control the trade-off among power consumption, count rate, and noise performance can be obtained for a desired application. Additionally, the IC can be connected to sensors with a pixel pitch that is a multiplication of 25 um (e.g. 25 um, 50 um, 75 um, etc.). For operation with the detector pixel pitch of 50 um or higher any non-operating blocks/pixels in the readout matrix can be switched off, while their currents can be reused by working blocks/pixels only. Also each readout pixel can use up to 4 discriminators and 4 counters with different threshold settings.